Silicon Systems Consulting
NBTek bridges the gap between academic research and industry needs, delivering actionable guidance from early architecture exploration through tape-out readiness.
Expert Witness & Litigation Support
Dr. Nader Bagherzadeh brings over 35 years of academic rigor and industrial insight to intellectual property litigation. As a Professor and former Department Chair of Electrical Engineering and Computer Science at the University of California, Irvine, Dr. Bagherzadeh offers authoritative technical analysis in complex patent infringement, trade secret, and validity disputes. His expertise spans the full spectrum of computer architecture, including VLSI design, microprocessor architecture, GPUs, AI, machine learning accelerators, automotive computing, error correction, memory systems (DRAM, SRAM, Flash), and System-on-Chip (SoC) integration.
A seasoned testifying expert, Dr. Bagherzadeh has served in dozens of high-profile cases across U.S. District Courts and the International Trade Commission (ITC). He has been retained by counsel for global technology leaders—including Apple, Samsung, Qualcomm, Google, and Broadcom—providing clear, defensible testimony on matters ranging from mobile device architecture and power management to automotive computing and network protocols. His ability to distill intricate engineering concepts for judges and juries makes him a formidable asset in high-stakes technology litigation.
- Expert testimony in patent infringement and trade secret cases
- Technical analysis and report preparation for litigation
- Prior art research and invalidity analysis in IC/SoC domains
- Deposition and trial testimony on semiconductor technology matters
SoC Architecture Consulting
Strategic guidance for high-performance and low-power System-on-Chip designs, drawing on decades of research in processor microarchitecture and system integration.
- Architecture trade studies and design space exploration
- Microarchitecture specification and review
- Performance modeling and power budgeting
- Multi-core platform design strategies
Network-on-Chip Design
Expert consultation on communication fabrics that connect hundreds of cores on a single die, including wired, wireless NoC, and 3D IC integration strategies.
- NoC topology exploration and router design
- Wireless interconnect feasibility analysis
- 3D IC integration via Through-Silicon Vias (TSVs)
- Fault-tolerant routing and mapping algorithms
Reconfigurable Computing
Design and evaluation of coarse-grained reconfigurable array (CGRA) architectures and adaptive hardware platforms for compute-intensive workloads.
- CGRA architecture design and evaluation
- Hardware/software partitioning strategies
- Accelerator design for domain-specific workloads
- FPGA vs. CGRA trade-off analysis
Embedded Systems Optimization
Optimization of embedded computing platforms for real-time workloads, focusing on memory hierarchy design and power-aware scheduling strategies.
- Memory hierarchy design and optimization
- Real-time scheduling under timing constraints
- Power-aware design for mission-critical systems
- Sensor network architecture planning
AI Hardware Acceleration
Hardware/software co-design for deep neural network inference engines, leveraging approximate computing techniques for energy-efficient AI acceleration.
- DNN accelerator architecture design
- Approximate computing for energy-efficient inference
- Hardware/software co-design methodology
- Accuracy vs. efficiency trade-off analysis
Fault-Tolerant VLSI Design
Reliability analysis and fault-tolerant design strategies for modern VLSI systems, addressing challenges from process variation and transistor scaling.
- Reliability analysis and fault modeling
- Fault-tolerant routing for NoC architectures
- Redundancy techniques and error correction
- Energy-aware reliability optimization
Engagement Models
Advisory Retainer
Ongoing strategic guidance for organizations navigating complex silicon design decisions. Regular consultations, architecture reviews, and access to deep domain expertise.
Project-Based
Defined-scope engagements for specific technical challenges. Architecture reviews, design validation, feasibility studies, and targeted optimization projects.
Research Collaboration
Joint research programs that combine academic rigor with industrial application. Co-authored publications, graduate student mentorship, and technology transfer.
Ready to Get Started?
Whether you need a one-time architecture review or ongoing advisory support, we tailor our engagement to your specific needs and timeline.